An ASIC incorporating a LEON2- FT design has been designed by ESA-ESTEC and manufactured using the commercial UMC 0.18u process. A development board with appropriate memory and interfaces to enable the demonstration and testing of these devices was designed and manufactured. This board has been used to demonstrate the operation of the ASIC, and in order to perform verification of the SEU performance of the LEON-FT logic implemented on the commercial UMC 0.18u process. Numerous SEU events were logged during the testing, including multiple events. All events were correctly detected and corrected by the FT logic inherent in the design, and no crashes or anomalous behavior of the device occurred.
Authors: Jiri Gaisler and Richard Pender.